Semiconductor device
US7291883B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2006 |
| Grant date | Nov 6, 2007 |
| Priority date | — |
| Expiry date | May 1, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
Abstract
In a conventional semiconductor device, there is a problem that an N-type diffusion region provided for protecting an element from an overvoltage is narrow and a breakdown current is concentrated so that a PN junction region for protection is broken. In a semiconductor device of the present invention, an N-type buried diffusion layer is formed across a substrate and an epitaxial layer. A P-type buried diffusion layer is formed across a wider region on an upper surface of the N-type buried diffusion layer so that a PN junction region for overvoltage protection is formed. A P-type diffusion layer is formed so as to be connected to the P-type diffusion layer. A breakdown voltage of the PN junction region is lower than a breakdown voltage between a source and a drain. With this structure, the concentration of the breakdown current is prevented so that the semiconductor device can be protected from the overvoltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.