Method of interconnect for multi-slot metal-mask programmable relocatable function placed in an I/O region
US7292063B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 2005 |
| Grant date | Nov 6, 2007 |
| Priority date | — |
| Expiry date | Oct 18, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for interconnecting sub-functions of metal-mask programmable functions that includes the steps of (A) forming a base layer of a platform application specific integrated circuit (ASIC) comprising a plurality of pre-diffused regions disposed around a periphery of the platform ASIC, (B) forming two or more sub-functions of a function with a metal mask set placed over a number of the plurality of pre-diffused regions of the platform application specific integrated circuit and (C) configuring one or more connection points in each of the two or more sub-functions such that interconnections between the two or more sub-functions are tool routable in a single layer. Each of the pre-diffused regions is configured to be metal-programmable.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.