Method and circuit for sampling/holding a signal
US7292071B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2005 |
| Grant date | Nov 6, 2007 |
| Priority date | — |
| Expiry date | Mar 15, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit and method thereof for sampling/holding signal is provided. The signal sampling/holding circuit comprises a first signal sampling/holding device, a second signal sampling/holding device, a target signal and a reference voltage. First, the first signal sampling/holding device is supplied with the reference voltage and the target signal. The reference voltage is disconnected from the first signal sampling/holding device before the target signal is. Similarly, the reference voltage is disconnected from the second signal sampling/holding device before the target signal is. Thus the target signal is respectively sampled and held in the first signal sampling/holding device and the second signal sampling/holding device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.