Method and apparatus for reducing interference
US7292091B1 · kind B1 · utility
4Cited by
23References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2005 |
| Grant date | Nov 6, 2007 |
| Priority date | — |
| Expiry date | Jun 29, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49124
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.