Semiconductor non-volatile memory cell with a plurality of charge storage regions
US7294880B2 · kind B2 · utility
6Cited by
8References
5Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 17, 2004 |
| Grant date | Nov 13, 2007 |
| Priority date | — |
| Expiry date | Aug 17, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.