Static random access memory (SRAM) cell
US7295459B2 · kind B2 · utility
15Cited by
5References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 11, 2005 |
| Grant date | Nov 13, 2007 |
| Priority date | — |
| Expiry date | Sep 10, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An SRAM memory cell employing thin-film transistors is provided having a first transmission gate, a second transmission gate and a bi-stable flip-flop comprising a first and a second inverter disposed between the first and the second transmission gate. A third transmission gate is coupled between an output terminal of the second inverter and an input terminal of the first inverter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.