Receiver having a variable threshold slicer stage and a method of updating the threshold levels of the slicer stage
US7295630B2 · kind B2 · utility
1Cited by
6References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2001 |
| Grant date | Nov 13, 2007 |
| Priority date | — |
| Expiry date | Apr 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/061
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver having a variable bit slicer for detecting bits in a demodulated signal, comprises a demodulator (14) for deriving a demodulated bit rate signal, means (36) for storing a plurality of threshold values, each of the threshold values being selectively adjustable, means (28, 38) for selecting the threshold value for comparison with the current bit signal (Sn) in response to a sequence of N bits (where N is at least 2) (Bn-1, Bn-2) received prior to the current bit (Bn) and means (38, 40) for using the current bit to update the selected threshold value.Also disclosed is a method of dc offset correction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.