ΣΔ-analog-to-digital modulator and digital filter for improved noise immunity
US7298307B2 · kind B2 · utility
5Cited by
4References
6Claims
0Family size
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Key dates
| Filing date | Mar 23, 2006 |
| Grant date | Nov 20, 2007 |
| Priority date | — |
| Expiry date | Mar 23, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/456
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A ΣΔ analog-to-digital converter has a ΣΔ modulation section which executes ΣΔ modulation, and a digital filter which filters a digital signal output from the ΣΔ modulation section. The digital filter has gain properties that one of dips of a gain of the digital filter corresponds to a noise frequency which is, for example, the commercial frequency 60 Hz. Especially, the lowest frequency of the dips corresponds to the noise frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.