Scheduling system and method for a burst switch
US7298728B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2002 |
| Grant date | Nov 20, 2007 |
| Priority date | — |
| Expiry date | Jan 5, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/56
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A scheduling system and method operable with a burst switching element wherein control information is provided to the switching element via a separate Burst Header that precedes data bursts on ingress data channels. In one embodiment, a series of scheduling determinations are made in a select order such that packet treatment (i.e., processing for transmission, buffering, or packet dropping) is optimized with respect to packet loss and available buffer space. In another embodiment, control information received in the Burst Headers is utilized to reserve output data channel bandwidth to future incoming data packets in a forward-looking scheduling mechanism.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.