Method and apparatus for decomposing and verifying configurable hardware
US7299155B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2005 |
| Grant date | Nov 20, 2007 |
| Priority date | — |
| Expiry date | Jan 31, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention includes a method and apparatus for decomposing and verifying configurable hardware. In one embodiment, the method includes automatically decomposing a set of one or more units at a first level of a configurable hardware system design hierarchy into a set of two or more units of a lower level of the hardware system design hierarchy. The set of one or more units at a first level includes one or more units dynamically instantiated at design creation time as well as at least a first unit composed of a previously instantiated hardware system composed with two or more levels of units within the hardware system design hierarchy of the previously instantiated hardware system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.