Method for tracing paths within a circuit
US7299431B2 · kind B2 · utility
4Cited by
11References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 7, 2005 |
| Grant date | Nov 20, 2007 |
| Priority date | — |
| Expiry date | Feb 4, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for tracing paths within a circuit includes receiving a transistor level netlist description. After receiving the transistor level netlist, convert the transistor level netlist to a transistor level data structure. Then, convert the transistor level data structure to a set of channel connect groups (CCG). A directed graph of the CCG may be generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.