Multi-layered complementary conductive line structure and manufacturing method thereof and manufacturing method of a thin film transistor display array
US7300811B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Nov 8, 2005 |
| Grant date | Nov 27, 2007 |
| Priority date | — |
| Expiry date | Apr 4, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/1368
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A multi-layered complementary conductive line structure, a manufacturing method thereof and a manufacturing method of a TFT (thin film transistor) display array are provided. The process of TFT having multi-layered complementary conductive line structures does not need to increase the mask number in comparison with the currently process and is able to solve the resistance problem of the lines inside a display.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.