Semiconductor device, method for manufacturing same and thin plate interconnect line member
US7301228B2 · kind B2 · utility
9Cited by
11References
9Claims
0Family size
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Key dates
| Filing date | Dec 3, 2003 |
| Grant date | Nov 27, 2007 |
| Priority date | — |
| Expiry date | Dec 3, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/24917
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a low-profile and light-weight semiconductor device having improved product reliability and higher frequency performance. A multi-layer interconnect line structure is disposed just under circuit devices 410a and 410b. An Interlayer insulating film 405 that composes a part of the multi-layer interconnect line structure is formed of a material having a relative dielectric constant within a range from 1.0 to 3.7, and a dielectric loss tangent within a range from 0.0001 to 0.02.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.