Enhanced efficiency feed forward power amplifier with delay mismatched error cancellation loop
US7301397B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2006 |
| Grant date | Nov 27, 2007 |
| Priority date | — |
| Expiry date | Mar 10, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2201/3212
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A delay mismatched feed forward power amplifier is disclosed. Loop 1 includes a main amplifier and is used to derive a carrier cancelled sample of the main amplifier output. Loop 2 includes an error amplifier used to amplify the carrier cancelled signal derived from Loop 1 operation in order to cancel distortion products generated due to the nonlinear nature of the main amplifier. Loop 2 also utilizes a very short Loop 2 delay line. A significant efficiency gain is provided due to reduced output power losses associated with the Loop 2 delay line. Lower output losses also results in lower distortion levels produced by the main amplifier. This, in turn, reduces the size and performance requirements placed on the error amplifier. A smaller and more efficient error amplifier is employed resulting in further amplifier system efficiency improvement. The delay mismatch is compensated by a third control loop, a special adaptive control algorithm or a combination thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.