Chipset support for managing hardware interrupts in a virtual machine system
US7302511B2 · kind B2 · utility
20Cited by
208References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2005 |
| Grant date | Nov 27, 2007 |
| Priority date | — |
| Expiry date | Oct 13, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, an apparatus includes a set of multiplex blocks coupled with an interrupt controller and multiple interrupt request lines, and a virtual machine monitor block (VMM) coupled to the set of multiplex blocks. Each multiplex block corresponds to a distinct interrupt request line. Each multiplex block is to route the interrupt request signal received via the corresponding interrupt request line either to the interrupt controller or the VMM block depending on a current configuration value of this multiplex block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.