Output buffer stage
US7304505B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2005 |
| Grant date | Dec 4, 2007 |
| Priority date | — |
| Expiry date | Feb 3, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The output buffer stage includes a half-bridge output stage having a first pair of complementary drivers connected in series between a supply line and a ground node, the high impedance state or conduction state of which is determined through a pair of control phases. The buffer stage includes a pair of switches controlled by the control phases, connected in series between them and connecting the transistors of the first stage in series. Each driver is connected in series with a switch, that is quickly opened to prevent under-threshold currents from circulating when the respective driver is turned off, and that is rapidly turned off when the respective driver is turned on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.