Method of adding a dither signal in output to the last integrator of a sigma-delta converter and relative sigma-delta converter
US7304592B2 · kind B2 · utility
8Cited by
7References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 26, 2006 |
| Grant date | Dec 4, 2007 |
| Priority date | — |
| Expiry date | May 26, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/454
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A single-ended or differential single-stage, or multi-stage sigma-delta analog-to-digital converter includes at least one switched-capacitor integrator comprising a switched-capacitor network receiving as input a signal to be sampled, and an amplifier coupled in cascade to the switched-capacitor network. A circuit is coupled to the amplifier for feeding an analog dither signal to a virtual ground of the amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.