Method and system for parallel state machine implementation
US7307453B1 · kind B1 · utility
16Cited by
13References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2004 |
| Grant date | Dec 11, 2007 |
| Priority date | — |
| Expiry date | Feb 28, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and computer readable media are provided for implementing state machines in parallel. A control vector is generated from current state and input bits. This vector is then used to determine the next state and any output bits for each of a plurality of state machines in parallel. In some implementations, the Altivec vperm instruction is used to perform a parallel table look-up.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.