Method and apparatus for an integrated high definition television controller
US7307667B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2004 |
| Grant date | Dec 11, 2007 |
| Priority date | — |
| Expiry date | Jun 26, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/4435
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus for an integrated high definition television controller are described. The integrated high definition digital television controller includes two or more the following functions in a single chip: MPEG2 Transport, Audio and Video Decoders, Video input capture and converter, flexible video scan rate converter, de-interlace processor, display controller and video D/A converters, graphics controller, a unified local bus, N-plane alpha blending, a warping engine, audio digital signal processor, disk drive interface, peripheral bus interfaces, such as PCI bus and local bus interfaces, various I/O peripherals, a bus bridge with a partitioned chip, and a CPU with caches. The integrated controller, in one embodiment, is designed to handle multiple television standards (for example ATSC, ARIB, DVB, AES, SMPTE, ITU) and designed to be deployed in various countries in the world.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.