Programmable strength output buffer for RDIMM address register
US7307863B2 · kind B2 · utility
91Cited by
5References
16Claims
0Family size
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Key dates
| Filing date | Aug 2, 2005 |
| Grant date | Dec 11, 2007 |
| Priority date | — |
| Expiry date | Apr 1, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable strength output buffer intended for use within the address register of a memory module such as a registered DIMM (RDIMM). The output signals of an array of such buffers drive respective output lines that are connected to the address or control pins of several RAM chips. The programmable buffers vary the strength of at least some of the output signals in response to a configuration control signal, such that the output signals can be optimized for the loads to which they will be connected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.