Information transfer and interrupt event scheduling scheme for a communications transceiver incorporating multiple processing elements
US7307977B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2002 |
| Grant date | Dec 11, 2007 |
| Priority date | — |
| Expiry date | Apr 24, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W52/58
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A real-time optimizing information transfer and interrupt event scheduling scheme for a communications transceiver incorporating multiple processing elements. The scheme is particularly applicable for use in UMTS based communications transceivers, i.e. W-CDMA transceivers adapted for User Equipment (UE). The interrupt scheduling scheme of the present invention is operative to perform the scheduling of interrupts used to configure a data transfer device to effect the timely transfer of data from a hardware based chip rate processor to a memory buffer for subsequent processing by software running on a DSP or other processor platform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.