Patent · US Expired

Redundant oscillator distribution in a multi-processor server system

US7308592B2 · kind B2 · utility

8Cited by

6References

5Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Dietmar Schmunkamp · Schenefeld, DE
Andreas Wagner · Eppelheim, DE
Tobias Webel · Eppelheim, DE
Ulrich Weiss · Holzgerlingen, DE

Key dates

Filing date	Feb 11, 2005
Grant date	Dec 11, 2007
Priority date	—
Expiry date	Mar 4, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/20
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The present invention relates to system clocking in computer systems. In particular, it relates to system clocking in high-end multi-processor, multi-node server computer systems with an enhanced degree of performance and reliability and to a method for dynamically switching between a first and a second clock signal, if the first should fail. More redundancy even to the Dynamic Clock Switching Circuit (DCSC) (14) and the wiring (17) from there to multiple, PLL-(12) free clock chips (22) is provided. Instead of only one DCSC (14) and one single wiring (17), two of them (14-0, 14-1; 17-0, 17-1) are used combined with a further particular logic present on each clock chip (22), which in combination generate two synchronous, fine-tuned, minimum-shifted clock signals and select always the first of them to arrive at a FlipFlop controlling the output for clock distribution wiring.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.