Inverted CSP stacking system and method
US7309914B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 20, 2005 |
| Grant date | Dec 18, 2007 |
| Priority date | — |
| Expiry date | Jan 24, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10734
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Two or more integrated circuits are stacked into a high density circuit module. The lower IC is inverted. Electrical connection to the integrated circuits is made by module contacts on a flexible circuit extending along the lower portion of the module. In one embodiment, the flexible circuit provides a balanced electrical connection to two CSP integrated circuits. In another embodiment, the flexible circuit provides a balanced electrical connection to inter-flex contacts of additional flexible circuits on two submodules. The additional flexible circuits provide further balanced connections to CSP integrated circuits in each submodule.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.