Method and/or apparatus for reducing the complexity of H.264 B-frame encoding using selective reconstruction
US7310371B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2003 |
| Grant date | Dec 18, 2007 |
| Priority date | — |
| Expiry date | Aug 4, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/61
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus comprising an output circuit, a first processing circuit and a second processing circuit. The output circuit may be configured to generate an output data stream in response to (i) a first intermediate signal, (ii) a second intermediate signal, and (iii) a third intermediate signal. The first processing circuit may be configured to generate the first intermediate signal in response to (i) a processed video signal and (ii) a prediction flag. The second processing circuit may be configured to generate (i) the processed video signal, (ii) the second intermediate signal and (iii) the third intermediate signal in response to an input video signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.