Method of polishing a semiconductor-on-insulator structure
US7312154B2 · kind B2 · utility
10Cited by
7References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2005 |
| Grant date | Dec 25, 2007 |
| Priority date | — |
| Expiry date | Dec 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/26
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A method of polishing a semiconductor layer formed on a transparent substrate is described, the method including measuring the thickness of the semiconductor from the substrate side of the semiconductor layer simultaneously with the polishing, and using the thickness measurement to modify the polishing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.