Pixel having an oxide layer with step region
US7312484B1 · kind B1 · utility
7Cited by
4References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2006 |
| Grant date | Dec 25, 2007 |
| Priority date | — |
| Expiry date | Feb 7, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/802
Abstract
A semiconductor structure, having a doped well region being formed in a substrate layer and a transistor having a terminal provided within said doped well region. The semiconductor structure also includes an oxide layer formed over the substrate layer, the doped well region, a poly silicon region, and the terminal of the transistor. The oxide layer including a step region being located where a height of the oxide layer transitions from a height associated with the doped well region to a height associated with the terminal of the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.