GPS receiver having RF front end power management and simultaneous baseband searching of frequency and code chip offset
US7313421B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2004 |
| Grant date | Dec 25, 2007 |
| Priority date | — |
| Expiry date | Feb 10, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01S19/34
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A GPS receiver includes baseband resources for simultaneous determination of carrier frequency shift and code chip offset. Reduction in the power consumption of a receiver is achieved by managing the sampling rate of an analog-to-digital converter, the intermediate frequency of the RF front end, and the front end bandwidth so these are appropriate to the current function of the receiver. In a GPS receiver during signal tracking, the IF, front end bandwidth, and ADC sampling rate are set as high as possible; during signal acquisition, the IF and front end bandwidth are set to relatively low values, and the ADC sample rate is set to a high value; and during ephemeris download, the IF, front end bandwidth, and the ADC sample rate are set to relatively low values. When a low battery condition is detected, the IF, front end bandwidth, and the ADC sample rate are set to relatively low values regardless of whether the GPS receiver is in the signal acquisition mode, signal tracking mode, or ephemeris download mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.