Method and apparatus of integrating link layer security into a physical layer transceiver
US7313686B2 · kind B2 · utility
2Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2003 |
| Grant date | Dec 25, 2007 |
| Priority date | — |
| Expiry date | Jan 18, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04K1/00
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An apparatus for providing link layer security in a Physical Layer Transceiver (PHY) is disclosed. In one embodiment, the apparatus may comprise analog circuitry configured to interface with a data transmission medium, digital circuitry configured to interface with a Media Access Controller (MAC); and an crypto engine coupled to the digital circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.