Hybrid scan-based delay testing technique for compact and high fault coverage test set
US7313743B2 · kind B2 · utility
4Cited by
3References
15Claims
0Family size
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Key dates
| Filing date | Sep 4, 2003 |
| Grant date | Dec 25, 2007 |
| Priority date | — |
| Expiry date | Sep 21, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1816
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A scan-based method for testing delay faults in a circuit comprising controlling a subset of state inputs of the circuit by a skewed-load approach and controlling all inputs other than said subset of state inputs by a broad-side approach.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.