Bit depth reduction for analog to digital conversion in global positioning system
US7315277B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2003 |
| Grant date | Jan 1, 2008 |
| Priority date | — |
| Expiry date | Nov 13, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01S19/37
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Disclosed is a system and method for reducing a bit-depth requirement for an A/D converter in a GPS receiver having an antenna for receiving an analog input signal and a low noise amplifier for amplifying the input signal, comprising a filter for filtering about a bandwidth B the amplified signal; a down-conversion module centering the frequency of the filtered signal about a center frequency f0; an automatic gain controller (AGC) for setting a set point of the input signal; an adder for adding noise to the gain controlled signal, said noise based upon the bandwidth B and center frequency f0; and an analog to digital (A/D) converter for converting the added noise signal to a digital signal, wherein the noise added to the gain controlled signal reduces the bit depth requirement of the A/D converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.