Hearing aid with performance-optimized power consumption for variable clock, supply voltage and DSP processing parameters
US7315626B2 · kind B2 · utility
18Cited by
5References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 20, 2002 |
| Grant date | Jan 1, 2008 |
| Priority date | — |
| Expiry date | Mar 18, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a hearing aid with optimized and controllable power consumption. The power consumption is controlled by varying the voltage level of the supply voltage and/or the frequency of the clock signal. Furthermore the invention relates to a method of optimizing the power consumption of a hearing aid, by calibrating its supply voltage and its clock frequency, and the relation between them, according to the production characteristics of the digital signal processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.