Method for managing an external memory of a microprocessor
US7315931B2 · kind B2 · utility
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2References
14Claims
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Key dates
| Filing date | Sep 12, 2003 |
| Grant date | Jan 1, 2008 |
| Priority date | — |
| Expiry date | Jun 3, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0623
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for managing an external memory of a microprocessor so that the external memory only contains one copy of a common area. By providing an address translator, mapping the page and the address of the common area of the page pointed by a microprocessor to the physical address of the common area of the external memory, using the address translator to translate a page and an address pointed by a microprocessor to a physical address of the external memory, and using the microprocessor to access data stored at the physical address of the external memory; the memory can be more efficiently used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.