Parallel current mode control using a direct duty cycle algorithm with low computational requirements to perform power factor correction
US7317625B2 · kind B2 · utility
25Cited by
41References
9Claims
0Family size
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Key dates
| Filing date | Jun 4, 2004 |
| Grant date | Jan 8, 2008 |
| Priority date | — |
| Expiry date | Dec 16, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method and apparatus to implement parallel current mode control that is suitable for digital and analog implementation. A duty cycle algorithm is composed of a voltage term and a parallel current term which depends on the inductor current change between the inductor current value at the beginning of a switching cycle and the reference inductor current value at the end of that switching cycle. Parallel current mode control can be applied to all DC-DC converters, including both non-isolated and isolated topologies. It can also be applied to AC-DC converters with power factor correction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.