Synchronization symbol re-insertion for a decision feedback equalizer combined with a trellis decoder
US7321642B2 · kind B2 · utility
1Cited by
92References
5Claims
0Family size
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Key dates
| Filing date | Apr 4, 2003 |
| Grant date | Jan 22, 2008 |
| Priority date | — |
| Expiry date | Dec 6, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03267
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A digital equalizer for interpreting a digital signal including convolutionally encoded symbols and synchronization symbols outside the convolutional code comprises a combined trellis encoder and DFE. The synchronization symbols are re-inserted into the input of the DFE in order to restore time domain continuity created by removal of the synchronization symbols.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.