Simulating a dose rate event in a circuit design
US7322015B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2005 |
| Grant date | Jan 22, 2008 |
| Priority date | — |
| Expiry date | Jan 30, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Behaviors of a transistor during a dose rate event can be modeled using a circuit simulation software package. A subcircuit model replaces a transistor in a circuit design to be simulated. The subcircuit model can be in the form of a schematic-based representation or a netlist. The subcircuit model provides a model of a source junction and a drain junction in the transistor during the dose rate event. The subcircuit model also includes the size of the transistor being replaced and the dose rate of the dose rate event. Once the transistor is replaced with the subcircuit model, a dose rate simulation may be performed to determine the dose rate hardness of the circuit design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.