MOS transistor circuit and voltage-boosting booster circuit
US7323753B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2004 |
| Grant date | Jan 29, 2008 |
| Priority date | — |
| Expiry date | Jan 29, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/073
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
To an output of an NMOS having one end connected to a power source, a capacitor and a PMOS are connected. A capacitor is connected to the output of the PMOS. The NMOS and the PMOS are turned on alternately. A pulse is applied to other end of the capacitor which is connected to the output of the NMOS, to shift the output of the NMOS for boosting. Then, a back gate of the NMOS is connected, via a PMOS in an on state, to the power source. With this structure, the PMOS provides a resistor component when the output terminal short-circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.