Method of testing a semiconductor chip and jig used in the method
US7323891B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2006 |
| Grant date | Jan 29, 2008 |
| Priority date | — |
| Expiry date | May 24, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/49171
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of and testing jig for sequentially testing front and rear surfaces of a semiconductor chip is shown. The testing jig includes a support package having a first cavity over which the semiconductor chip mounts; an infrared filter affixed relative to the first cavity and attached to a rear surface of the semiconductor chip; and a test substrate having a second cavity exposing the infrared filter and upon which the support package mounts. Front and rear surfaces of the semiconductor chip can be conveniently and sequentially tested. Because the testing jig includes the infrared filter and the heat pad, heat can be easily transmitted to the defective chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.