Clock generator, system on a chip integrated circuit and methods for use therewith
US7323921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2005 |
| Grant date | Jan 29, 2008 |
| Priority date | — |
| Expiry date | Nov 22, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system on a chip integrated circuit includes a first circuit module and N other circuit modules that are operable to produce at least one output signal based on at least one input signal. A reference oscillator for generating a base clock signal for the first circuit module. A clock delay generator generates N delayed clock signals at a corresponding N clock delays, wherein N is greater than or equal to 2. The N delayed clock signals are provided to the N other circuit modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.