Switching device with asymmetric port speeds
US7324537B2 · kind B2 · utility
18Cited by
37References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2003 |
| Grant date | Jan 29, 2008 |
| Priority date | — |
| Expiry date | Feb 9, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/602
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In general, in one aspect, the disclosure describes a switching device that includes a plurality of ports. The ports operate at asymmetric speeds. The apparatus also includes a switching matrix to provide selective connectivity between the ports. The apparatus further includes a plurality of channels to connect the ports to the switching matrix. The number of channels associated with each port is determined by speed of the port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.