Thin film transistor with common contact hole and fabrication method thereof
US7326959B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 16, 2005 |
| Grant date | Feb 5, 2008 |
| Priority date | — |
| Expiry date | May 16, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0223
Abstract
The present invention provides a TFT substrate that includes a plurality of TFTs each of which have a gate, a source and a drain. The plurality of the TFTs may be formed by first and second active regions formed on the substrate that each have a source region that corresponds to a source and a drain region that corresponds to a drain. An offset region may be formed between the first and second active regions. A single contact hole may reach both the offset region and the adjacent source/drain regions of the first and second active regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.