Integrated clock generator with programmable spread spectrum using standard PLL circuitry
US7327172B2 · kind B2 · utility
9Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2005 |
| Grant date | Feb 5, 2008 |
| Priority date | — |
| Expiry date | Jun 27, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1976
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus comprising a phase lock loop circuit and a control circuit. The phase lock loop circuit configured to generate an output signal having a first frequency in response to (i) an input signal having a second frequency, (ii) a first divider value and (iii) a second divider value. The second divider value may control spread spectrum modulation of the phase lock loop circuit. The control circuit configured to generate the second divider value in response to (i) the output signal and (ii) a programmable control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.