Patent · US Expired

Fast switching phase lock loop (PLL) device and method

US7327196B2 · kind B2 · utility

4Cited by
3References
21Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 5, 2005
Grant dateFeb 5, 2008
Priority date
Expiry dateFeb 18, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/181
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A fast switching phase lock loop (PLL) device is provided. The PLL has a voltage controlled oscillator that generates a signal at a frequency according to a received voltage. A memory holds a set of adjustment values, with each adjustment value set to cause the VCO to pre-tune to a desired frequency. When a new frequency is required from the VCO, the PLL counters are set for the new frequency values, and the adjustment value associated with the new frequency is retrieved from memory. A voltage generator uses the adjustment value to generate a new control voltage, which pre-tunes the VCO to a frequency near the desired frequency. In this way, the VCO only needs to make minor adjustments through its loop feedback filter to lock to the new frequency. After the VCO is locked, the actual control voltage is measured and used to update the adjusted value for that frequency. In this way, the set of adjustment values are continually updated to adapt to changing environmental or circuit conditions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.