Differential input buffer for receiving signals relevant to low power
US7327620B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2004 |
| Grant date | Feb 5, 2008 |
| Priority date | — |
| Expiry date | Feb 5, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45592
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are exemplary embodiments of an improved differential input buffer for receiving low power signals and associated methods. The disclosed buffer circuit comprises at least one differential amplifier for receiving as inputs an enable signal (e.g., a clock enable signal) and a reference signal, and provides a differential amplifier output representative of a comparison of the magnitude of the input signals. As improved, input buffer circuitry comprises a pull up stage to pull up the voltage of the differential amplifier output slightly higher during an output low condition. The pull up stage is preferably, but not necessarily, activated only during a problematic condition, such as when both input signals to the differential amplifier are low. By pulling up the output, the input buffer circuit enjoys improved margin, and is able to reliably signal a low power condition even when both inputs are low.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.