High-speed data processing using internal processor memory space
US7328277B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2001 |
| Grant date | Feb 5, 2008 |
| Priority date | — |
| Expiry date | Sep 24, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/22
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Significant performance improvements can be realized in data processing systems by confining the operation of a processor within its internal register file so as to reduce the instruction count executed by the processor. Data, which is sufficiently small enough to fit within the internal register file, can be transferred into the internal register file, and execution results can be removed therefrom, using direct memory accesses that are independent of the processor, thus enabling the processor to avoid execution of load and store instructions to manipulate externally stored data. Further, the data and execution results of the processing activity are also accessed and manipulated by the processor entirely within the internal register file. The reduction in instruction count, coupled with the standardization of multiple processors and their instruction sets, enables the realization of a highly scaleable, high-performing symmetrical multi-processing system at manageable complexity and cost levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.