Multiprocessor computing device having shared program memory
US7328314B2 · kind B2 · utility
29Cited by
4References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2002 |
| Grant date | Feb 5, 2008 |
| Priority date | — |
| Expiry date | Jul 18, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7864
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An instruction memory shared by a number of processing units has a plurality of individually accessible sections. A software program in the instruction memory is distributed among the memory sections. Sequential parts of the software program are in sequential sections. The software program may have a common portion which is repeated in each of the memory sections. Arbiter logic may control which of the processing units accesses which of the memory sections in each memory access cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.