Address detection system and method that compensates for process, temperature, and/or voltage fluctuations
US7330389B1 · kind B1 · utility
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6References
22Claims
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Key dates
| Filing date | Feb 2, 2006 |
| Grant date | Feb 12, 2008 |
| Priority date | — |
| Expiry date | Feb 13, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An address transition detector (ATD) system is provided with an integrator, a feedback circuit and an output circuit. The integrator has an enhanced architecture that ensures a fast output signal switching, low power consumption during the integration time, fast output transition at the end of the integration time and compensates the delay variations over process, voltage and temperature (PVT) fluctuations. The ATD system can be used in any asynchronous memory. In addition, the ATD integrator can be employed as a standalone circuit for use whenever a signal transition is to be delayed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.