Stacked integrated circuit device/data processor device having a flash memory formed on top of a buffer memory
US7336519B2 · kind B2 · utility
39Cited by
14References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 31, 2007 |
| Grant date | Feb 26, 2008 |
| Priority date | — |
| Expiry date | Jan 31, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processor includes an authentication function for judging access right. The data processor further includes a nonvolatile memory cell array formed on an insulator film or a chip, and a conductor layer provided between a logic circuit for the authentication and the nonvolatile memory. The nonvolatile memory can store at least part of authentication information or an authentication program.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.