System, method and storage medium for prefetching via memory block tags
US7337278B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2004 |
| Grant date | Feb 26, 2008 |
| Priority date | — |
| Expiry date | Nov 29, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0862
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for memory management including a tag cache in communication with one or more cache devices in a storage hierarchy. The tag cache includes tags of recently accessed memory blocks where each tag corresponds to one of the pages and each tag includes tag contents. The tag contents control which memory lines of the corresponding memory block are prefetched into at least one of the cache devices. The tag contents are updated using a selected subset of processor references. The subset is referred to as filtered references. The tag contents are modified probabilistically at selected time or events.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.