System and method for shutdown memory testing
US7337368B2 · kind B2 · utility
3Cited by
30References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2004 |
| Grant date | Feb 26, 2008 |
| Priority date | — |
| Expiry date | Nov 5, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/442
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In accordance with the teachings of the present disclosure, a system and method for reducing the amount of time for a boot operation is provided that substantially reduces disadvantages and problems associated with previously developed memory testing systems and methods. The system includes using a shutdown memory test module to perform the bulk of memory testing during system shutdown, rather than at system start up.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.