Analog-to-digital converter without track-and-hold
US7339512B2 · kind B2 · utility
16Cited by
10References
7Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 27, 2006 |
| Grant date | Mar 4, 2008 |
| Priority date | — |
| Expiry date | Jun 27, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/0695
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method for converting an analog signal to a digital signal is provided. The analog to digital conversion is achieved without a dedicated sample-and-hold circuit. An ADC stage, preferably the front-end stage in the case of a pipeline ADC, samples the input voltage within a quantizer and within a residue generator. The sampling is performed with associated clocking signals and with switch capacitors also fulfilling the comparison with threshold voltages, within the quantizer and the generation of a residue signal within the residue generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.